1. Field of the Invention
The invention relates to a circuit arrangement for synchronizing the units in the switching exchanges and repeaters of a time-division multiplex transmission system. The circuit has a basic clock signal generator G arranged in a first unit. The circuit also has a divider circuit connected to this generator. The circuit also has clock lines for transmiting the clock signals to second units connected to the first unit.
2. Prior Art
In local and regional networks time-division multiplex transmission systems are increasingly used. In the network of the German Federal Post Office a hierarchic, a digital transmission system is used for the transmission of messages. In the lowest order of the hierarchy the transmission system PCM 30 F is used. For the transmission of signalling characters the switching exchanges and repeaters comprise what is commonly referred to as signalling character converting devices.
In addition to its function as a converter, such as for example, taking in or delivering DC signals and producing and reconverting time-division multiplex signals, the signalling character converting device also has the tasks of evaluating and forming switching characters according to the standards of the respective connected switching exchanges, converting different characters for local and trunk traffic or for terminal and through-traffic into standardized character signals to be transmitted on PCM channels, processing the switching characters, for example, signal correction, storage and re-formation of signals etc. The signalling character converting device is divided into a central character converter (first unit) and the respective 30 channel units (second units). The signalling character converting device picks up the switching characters from the speech and signal wires of the selectors, processes them for all 30 telephone channels in the central signalling character converter and bundles them into a time-division multiples signal having a bit rate of 64 kbit/s.
The function of such a signalling character converting device is extensively discussed and explained in an article in "TE KA DE Technische Mitteilungen 1982", pages 20 to 27, entitled "Das Systemgerat PCM 30 F". In section 5.4 "KZU Taktversorgung (TVSK)" is set out that the basic generator arranged in the central signalling character converter, is connected to a divider circuit which supplies all clocks from 2048 KHz to 500 Hz required for the central processing and the PCM 30 F pulse frame formation. The channel-triggering clocks KAT1 . . . 30 for triggering the channel units during the right channel periods are formed by mutually combining corresponding portions of these clocks. The different clocks are required in the signalling character converting device as well as in the central signalling character converter and in the channel units to satisfy the requirements as regards switching and transmission technology. The clocks in the central character converter should be in-phase with the clocks in the channel units.
A first solution lies in making all clocks required in the channel units available through a plurality of clock lines from the central signalling character converter. In order to avoid the extensive bundle of clock lines required for this purpose, a second solution consists in passing only the highest and lowest clocks required in the channel unit through separate clock lines, and deriving in the channel units by frequency division the further clocks from the highest clock. However, a problem will occur because frequency divisions effected in the channel units and in the central signalling character converter are not in-phase with respect to each other.
A simple possibility to restore the phase equality consists in a master-slave synchronization of the frequency dividers. This master-slave synchronization is effected every 2 ms according to the 500 Hz frame clock of the identification signal. However, as a result of faults inside the transmission network, pulses can be included which can lead to a shift of the individual channels of the pulse frame in the channel units, so that audible clicking sounds may occur when transmitting speed signals. This will momentarily impair the audibility during the transmission of speech signals, whilst such displacements of bits will lead to errors in the data processing when transmitting data signals in the time-division multiplex transmission system.
Such problems occur in large switching exchanges, in which peripherals having decentralized control arrangements (second units) are controlled from a central control device (first unit).